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1 4bit single chip microcontroller DMC42C1008 description the DMC42C1008 is a microcomputer of the 4-bit single chip microcomputer dmc42xx series which can match an 8-bit microcomputer in the data processing capability. the DMC42C1008 can handle 1-bit, 4-bit, and 8-bit data as well as operates at high speed (minimum instruction execution time : 0.95us) it contains a lcd pannel controller/driver. pin configuration p02/int2 p00/int0/ti0 p01/int1 64 62 63 53 54 55 56 57 58 59 60 61 52 49 50 51 44 45 46 47 48 41 42 43 bias vlc0 v ss p62 p61 p60 vlc2 vlc1 p82 p81 p21 p20/clo p83 p63 p22 p80 25 33 31 30 29 28 27 26 36 35 34 39 38 37 32 40 seg12 seg14 seg13 seg23 seg22 seg21 seg20 seg19 seg18 seg17 seg16 seg15 seg24 seg27 seg26 seg25 com0 seg29 seg28 com3 com2 com1 seg31 seg30 1 3 2 12 11 10 9 8 7 6 5 4 13 16 15 14 21 20 19 18 17 24 23 22 p50/ks4 p42/ks2 p43/ks3 p33 v dd xti xto test xi x0 p40/ks0 p41/ks1 53 53 p32 p13/buz p30 p31 p03/int3 p10/sck p11/si p12/so p23 DMC42C1008 80 72 74 75 76 77 78 79 69 70 71 66 67 68 73 65
2 4bit single chip microcontroller DMC42C1008 feature memory mapped i/o 8-bit serial communication interface - external / internal clock selection program memory : 8192 x 10bits - mode : transmit receive receive only data memory : 512 x 4bits clock continuous instructions lcd controller/driver - various bit manipulation - selectable number of segments ; - 8-bit data operation 20/24/28/32 segment (4/8/12 lines can - 7-bit relative branch be specified as bit ports) - 1 byte absolute call - display mode selection static instruction cycle times 1/2 duty (1/2 bias) - main ( xi = 4.19mhz ) 1/3 duty (1/2 bias) . 15.3 us ( xi/64 = 65.5khz ) 1/3 duty (1/3 bias) . 1.91 us ( xi/8 = 524.0khz ) 1/4 duty (1/3 bias) . 0.95 us ( xi/4 = 1.05mhz ) - sub ( xti = 32.768khz ) key scan . 122 us ( xti/4 = 8.19khz ) - 4, 6, 8 pins selectable : port 4, 5 - falling edge operation 4 register bank 64 i/o pins general register : 8 x 4-bit respectively - lcd driver output pins : 36 . segment ouput pins : 20 accumulator . segment cmos output pins : 12 - bit accumulator (cy), 4 bit accumulator (a), . common ounput pins : 4 8 bit accumulator (xa) - cmos input/output pins : 32 multiple vectored interrupt source power saving mode - external interrupt : 4 - stop : main clock, cpu clock stop - internal interrupt : 4 - stby : only cpu clock stop main clock operation watch timer - fast mode : 3.91 msec package : 80 qfp - normal mode : 0.5 sec - buzzer output : 1, 2, 4 khz application basic interval timer - 8 kinds of period vtr, camera, rice cooker, telephone - used stabilization wait timer to wake up stop mode blood pressure gauge, cd player one 8-bit timer / event counter
3 4bit single chip microcontroller DMC42C1008 p20 ?- p23 p30 ?- p33 p60 ?- p63 p80 ?- p83 cpu clock dmc42 core basic interval timer irqbt watch timer irqtc0 timer/ event counter irqwt port2 port3 port6 port8 lcd control / driver display ram program memory (8192 x 10bits) fx / 2 v dd p20/clo v ss resetb clock output control clock generator stop/ idle control xti xto clocked serial interface irqs0 xo xi n data memory (512 x 4bits) bit seq. buffer(16) interrupt control seg0~seg19 bias vlc0~vlc2 com0~com3 seg20~seg30 (bp0~bp11) f lcd flcd buz/p13 so/p12 si/p11 sck/p10 ti0/int0/p00 ks0/p40 ks7/p53 int3/p03 int1/p01 int2/p02 clock divider test block diagram
4 4bit single chip microcontroller DMC42C1008 program memory (rom) vector address contents prioty interrupt suorce 0000h vector 0000h 0 reset reset signal address area 0002h 1 irqbt basic interval timer 001fh 0004h 2 irq0 external interrupt 0 0020h zero-page 0006h 3 irq1 external interrupt 1 call area 0008h 4 irqtc0 timer event counter 0 002fh 000ah 0060h 000ch 6 irq2 external interrupt 2 000eh 0010h 8 irq3 external interrupt 3 0012h 9 irqs0 serial i/o 0 0014h 8k byte 0016h 0018h 12 irqwt watch timer 001ah 13 irqks key scan 001ch 1fffh 001eh 15 - reserved data memory (ram) direct indirect stack general m @hl @de @dl register $00 rb=0 rb=1 page0 rb=2 rb=4 (256 byte) mp=0 sps=0 $ff $00 page1 (256 byte) mb=0 mb=0 mp=1 sps=1 bank 0 $ff (1k) $00 page2 (256 byte) mp=2 sps=2 $ff $00 page3 i/o (256 byte) memory mp=3 ; usable $ff
5 4bit single chip microcontroller DMC42C1008 i/o address map address hardware module name r/w addressing unit remarks initial b3 b2 b1 b0 1 bit 4 bit 8bit value 318h stack pointer low (spl) r/w o stack pointer low e 319h stack pointer high (sph) r/w o stack pointer high f 31ah sp3 sp2 sp1 sp0 r/w o stack page select low (spsl) 0 31bh - - sp5 sp4 r/w o stack page select high (spsh) 0 31ch ac is1 is0 r/w o o o psw low (pswl) 0 31dh cy z ov t psw high (pswh) 0 320h t/e counter mode register 0 w 320h.3 o clock source select. counter 00 321h (tmod0) start (ch0) 322h t/e counter register 0 r readable count value (ch0) 00 323h (tmcnt0) 324h t/e reference register 0 w count reference register (ch0) ff 325h (tmref0) 332h basic timer mode register(bmod) r/w 332h.3 clock select, bit start 0 334h basic interval timer count r readable count register 00 335h register(bitcnt) 336h watch timer mode register r/w 336h.3 clock/buzzer select. bit3 00 337h (wmod) readable 390h lcd display mode register w o duty/bias/clock/seg/bitport 00 391h (lcdmd) select 392h lcd control register (lcon) w o display on/off 0 3a0h power control register o system clock select, idle, stop 00 (pcon) r/w mode 3a2h operating mode register (scmod) r/w o main/sub system clock select 0 3a4h clock output mode register w o cpu clock output select, clock 00 (clomd) out en/dis 3a8h serial interface mode register0 w 3a8h.3 o receive/transmit mode. clock 00 3a9h (siom0) select 3aah serial interface buffer0 r/w serial shift register 0 xx 3abh (sbuff0) 3b2h power on flag (ponf) p/w 3b2h.0 o power on reset flag 0 3c2h ime r/w 3c2h.3 o interrupt priorty select, ime flag. 00 3c3h ipsr3 ipsr2 ipsr1 ipsr0 3c4h external interrupt mode register0 w o external interrupt 0 edge 00 (imod0) detection 3c5h external interrupt mode register1 w o external interrupt 1 edge 00 (imod1) detection 3c6h external interrupt mode register2 w o external interrupt 2 edge 00 (imod2) detection 3c7h external interrupt mode register3 w o external interrupt 3 edge 00 (imod3) detection 3d8h ie2 irq2 iebt irqbt r/w o o interrupt en/irq flag 0 3d9h iewt irqwt r/w o o interrupt en/irq flag 0
6 4bit single chip microcontroller DMC42C1008 address hardware module name r/w addressing unit remarks initial b3 b2 b1 b0 1 bit 4 bit 8bit value 3dah ieksf irqks ies0 irqs0 r/w o o interrupt en/irq flag 0 3dbh ietc0 irqtc0 r/w o o interrupt en/irq flag 0 3dch ie1 irq1 ie0 irq0 r/w o o interrupt en/irq flag 0 3ddh ie3 irq3 r/w o o interrupt en/irq flag 0 3deh r/w o o interrupt en/irq flag 0 3e0h pw03 pw02 pw01 pw00 w o port 0, 1 mode register (pmga) 00 3e1h pw13 pw12 pw11 pw10 3e2h pw23 pw22 pw21 pw20 w o port 2, 3 mode register (pmgb) 00 3e3h pw33 pw32 pw31 pw30 3e4h pw43 pw42 pw41 pw40 w o port 4, 5 mode register (pmgc) 00 3e5h pw53 pw52 pw51 pw50 3e6h pw63 pw62 pw61 pw60 w o port 6, 7 mode register (pmgd) 00 3e7h pw73 pw72 pw71 pw70 3e8h pw83 pw82 pw81 pw80 w o port 8, 9 mode register (pmge) 00 3e9h pw93 pw92 pw91 pw90 3f0h port0 (r0) r/w o o r0 port data register 0 3f1h port1 (r1) r/w o o r1 port data register 0 3f2h port2 (r2) r/w o o r2 port data register 0 3f3h port3 (r3) r/w o o r3 port data register 0 3f4h port4 (r4) r/w o o o r4 port data register 0 3f5h port5 (r5) r/w o o r5 port data register 0 3f6h port6 (r6) r/w o o r6 port data register 0 3f8h port8 (r8) r/w o o r8 port data register 0
7 4bit single chip microcontroller DMC42C1008 pin description pin shared i/o function reset port symbol pin type p00 int0/ti0 i/o - detection edge selectable input bps - with noise elimination function p01 int1 - edge detection vectored interrupt input pin p02 int2 i/o (detection edge selectable) input bps p03 int3 - event pulse input port for timer event counter p10 sck - serial clock i/o pin p11 si i/o - serial data input pin input bps p12 so - serial data output pin p13 buz - buzzer output pin p20 p21 i/o - 4bit i/o port input bp p22 p23 p30 p31 i/o - 4bit i/o port input bp p32 p33 p40 ks0 p41 ks1 i/o - falling edge detection keyscan input pin input bd p42 ks2 p43 ks3 p50 ks4 p51 ks5 i/o - falling edge detection keyscan input pin input bd p52 ks6 p53 ks7 p60 p61 i/o - 4bit i/o pin input bp-pdnd p62 p63 p80 p81 i/o - 4bit i/o pin input bp p82 p83
8 4bit single chip microcontroller DMC42C1008 pin description pin shared i/o function reset port symbol pin type seg0 ~ o - segment signal output pin op-segb seg19 seg20 ~ bp0 ~ 11 o - 1 bit output port (bit port) shared with op-sega seg31 a segment signal output pin com0 com1 o - common signal output op-coma com2 com3 vlc0 - lcd drive power pin split register network vlc1 (mask option) vlc vlc2 bias - lcd power supply bias control vlc xi i - main system clock input osc1 xo o - main system clock output xti i - sub system clock input osc2 xto o - sub system clock output resetb i - system reset input pin ip1 ip2 test i bp - chip function test input pin mask rom version otp rom version
9 4bit single chip microcontroller DMC42C1008 i/o circuits note) pur : pull-up resistor m.o : mask option pa pa pa pa pa op-coma op-sega bp data outpu t interna v dd pur (m.o) pa v ss bps bp-pdnd bd outpu t data interna pur (m.o) v dd v ss v dd data outpu t interna l v ss pur (m.o) v dd output tr disable (p-ch) outpu t data interna pur (m.o) v dd v ss v dd vlc seg data v ss vlc vlc vlc com data v ss vlc vlc output tr disable (n-ch)
10 4bit single chip microcontroller DMC42C1008 pad op-segb ip1 vlc ip2 osc1 osc2 pad v dd v ss v ss v dd vlc vlc vlc bia r r r=90k r 2r xo v ss xi xt xti v dd seg data pbit.x vlc v ss pa vlc vlc0
11 4bit single chip microcontroller DMC42C1008 absolute maximum ratings (t a = 0 ? to 70 ? , v dd = 5v 10%, f x = 4.19mhz) parameter symbol condition rating unit supply voltage - -0.3 to +7.0 v input voltage all i/o ports -0.3 to v dd +0.3 v output voltage - -0.3 to v dd +0.3 v output current high one i/o port active -15 ma all i/o ports active -30 output current low one i/o port active peak value +30 - rms value +15 total value for ports peak value +100 ma p1, p2, p3, p8 rms value +60 total value for ports peak value +100 p0, p4, p5, p6 rms value +60 operating temperature - -40 to +85 ? storage temperature t stg - -55 to +125 ? * rms values are calculated as peak value x duty * exceeding beyond those listed values under "absolute maximum ratings" may cause permanent damage to the device. v dd v i v o i oh i ol t a
12 4bit single chip microcontroller DMC42C1008 dc electrical characteristics parameter symbol test limit unit condition min. typ. max. high level port 0,1 (schmitt input) - input voltage - v - low level port 0,1 (schmitt input) 0 - input voltage 0 - v 0 - high level port 0,1,2,3,6 4.2 4.5 - v output voltage port 0,1,2,3,6 4.6 4.9 - low level port 4,5 (open-drain) - - 2 output voltage port 0,1,2,3,6 - 0.4 0.6 v port 0,1,2,3,6 - 0.1 0.3 high level port 0,1,2,3,4,5,6,8 - 1.2 3 input leakage v pp oex, xti, resetb ua current xi - 5 15 low level port 0,1,2,3,4,5,6,8 - -1.2 -3 input leakage v pp oex, xti, test ua current xi - -5 -15 supply current dynamic v dd = 5v 10% - - 10 main clock (xi) mode ma = 4.19mhz idle - - 5 mode (v ss = 0, v dd = 5v 10%, t a = 25 ? , f x = 4.19mhz) v il1 v ih1 i il v ol v oh (i ol = 10ma) (i ol = 1ma) (i oh = - 5ma) (i oh = - 100ua) xi, xti xi, xti i ih v ih2 v ih3 port 2,3,4,5,6,8, resetb, test 0.8 v dd v dd - 0.5 0.7 v dd v dd v dd v dd v il2 v il3 port 2,3,4,5,6,8, resetb, test 0.3 v dd 0.2 v dd 0.4 (i ol = 10ma) i dd1 (1)
13 4bit single chip microcontroller DMC42C1008 dc electrical characteristics parameter symbol test limit unit condition min. typ. max. supply current dynamic - - 2 main clock (xi) mode v dd = 3v 10% = 2mhz idle - - 1 ma mode dynamic - - 1.5 sub clock (xti) mode v dd = 3v 10% = 32.768khz idle - - 15 mode - - 5 ua main clock (xi) stop v dd = 5v 10% = 4.19mhz mode - - 3 pull-up v i = 0v, v dd = 5v 10% 20 - 60 resistor resetb kohm pull-down v i = 0v, v dd = 5v 10% 10 - 30 resistor test notes ) : (1) data include power consumption for subsystem clock oscillation. (2) main system clock oscillation stops and the subsystem clock is used. i dd2 (1) i dd3 (2) i dd5 i dd4 (2) r l1 r l2 (v ss = 0, v dd = 5v 10%, t a = 25 ? , f x = 4.19mhz)
14 4bit single chip microcontroller DMC42C1008 ac electrical characteristics (t a = -40 to +85 ? , v dd = 2.7 to 6.0v) parameter symbol test condition min. typ. max. unit cycle time 0.95 - 64 us 3.8 - 64 us sub system clock 114 122 125 us ti0 input frequency 0 - 1 mhz 0 - 275 khz ti0 input high, low 0.48 - - us level width 1.8 - - us interrupt input high, int0 (1) - - us low level width int1, 2, 3 10 - - us ks0 to ks7 10 - - us sck cycle time input 800 - - ns output 1600 - - ns input 3200 - - ns output 3800 - - ns sck high, low input 400 - - ns level width output - - ns input 1600 - - ns output - - ns si set up time to input 100 - - ns sck high output 150 - - ns si hold time to input 400 - - ns sck high output 400 - - ns sck to s0 output input - - 300 ns delay time output - - 250 ns input - - 1000 ns output - - 1000 ns resetb low level 10 - - us (1) 2tcy or 128/f x , depending on the setting of the interrupt mode register. main system clock v dd = 4.5 to 6.0v v dd = 2.7 to 3.3v v dd = 4.5 to 6.0v v dd = 2.7 to 3.3v v dd = 4.5 to 6.0v t cy f ti t tih t til t kcy v dd = 4.5 to 6.0v v dd = 2.7 to 3.3v v dd = 4.5 to 6.0v v dd = 2.7 to 3.3v t kh t kl t ksi t sik t kso v dd = 4.5 to 6.0v v dd = 2.7 to 3.3v t rsl t kcy /2~50 t kcy /2~15 v dd = 2.7 to 3.3v t inth t intl
15 4bit single chip microcontroller DMC42C1008 ac timing measurement points (except xi and xti) measuremen t 0.8v d 0.2v d 0.8v d 0.2v d 1/x i 1/xti 1/f ti t kc y t int l t int h t xl t xh t xt l t xt h t til t tih t kl t kh t rs l t sik t ksi 0.2v d 0.8v d t ks input data output data v dd - 0.4v v dd - 0.4v 0.8v d 0.2v d 0.8v d 0.2v d 0.8v d 0.2v d 0.2v d clock timing xi xti ti0 serial transfer timing sck si so interrupt input timing int0~int3 ks0~ks7 reset b resetb input timing timer event counter timing
16 4bit single chip microcontroller DMC42C1008 ram data retention characteristics ( in stop mode ) (t a = -40 to +85 ? ) parameter symbol test condition min. typ. max. unit 2.0 - 6.0 v - 0.1 10 ua 0 - - us when released by resetb - 2 17 /fx - ms - note 1) - ms note 1) depends on the setting of the basic interval timer mode register. (refer to the table below) ( f x = 4.19mhz ) bmod2 bmod1 bmod0 oscillation stabilization 0 0 0 2 20 /f x (approximately 250ms) 0 1 1 2 17 /f x (approximately 31.3ms) 1 0 0 2 15 /f x (approximately 7.82ms) 1 0 1 2 13 /f x (approximately 1.95ms) data retention supply voltage data retention supply current release signal set time v dddr i dddr t srel v dddr = 2.0v when released by interrupt signal oscillation stabilization wait time t wait
17 4bit single chip microcontroller DMC42C1008 ram data retention timing when stop mode is released by resetb input when stop mode is released by interrupt signal stop mode ram data retention v dddr v dd t srel t wai stop instruction execution operation mode stabilization wait time stop mode ram data retention v dddr v dd t srel t wai stop instruction execution resetb interrupt signal (rising edge) internal reset operation stabilization wait time operation mode
18 4bit single chip microcontroller dmc42p1008 description the dmc42p1008 is a system evaluation lsi having a built in one-time programming circuit. a programming and verification for the internal eprom is achieved by using a general eprom programmer with an adapter socket. the function of this device is exactly same as the DMC42C1008 with programming of the internal eprom. the dmc42p1008 is the otp version of the DMC42C1008 with replacement of mask rom to eprom as an internal rom. pin configuration dmc42p1008 dmc42p1008 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 1 5 4 3 2 8 7 6 9 10 12 11 27 28 29 30 31 32 33 34 35 36 37 38 39 bias vlc0 vlc1 vlc2 p60 p61 p62 p63/test v ss p80 p81 p82 p83/epd4 p20/clo p21 p22 25 26 seg12 seg16 seg15 seg14 seg13 seg19 seg18 seg17 seg20 seg21 seg23 seg22 14 13 15 18 17 16 19 20 21 22 23 24 seg25 seg24 seg26 seg29 seg28 seg27 seg30 seg31 seg31 com0 com1 com2 com3 p00/epa12/int0/ti0 64 60 61 62 63 57 58 59 56 55 53 54 p50/epa4/ks4 p40/epa0/ks0 p41/epa1/ks1 p42/epa2/ks2 p43/epa3/ks3 v pp /oex xi xo xto xti p33/epd3 v dd 51 52 50 47 48 49 46 45 44 43 42 41 p31/epd1 p32/epd2 p30/epd0 p11/epa9/si p12/epa10/so p13/epa11/buz p10/epa8/sck p03/int3 p02/cex/int2 p01/epa13/int1 p23 40
19 4bit single chip microcontroller dmc42p1008 device operation the operational modes of the dmc42p1008 are listed in table 1. a single 5v power supply is required in the read mode. all inputs are ttl levels except for v pp / oex. pins mode read 5.0v program 6.0v verify 6.0v program inhibit 6.0v high z table 1. operating modes mode eprom mode user mode test table 2. the modes of dmc42p1008 dc programming characteristics limit unit min. max. input low voltage -0.1 0.8 v input high voltage 2.0 v output low voltage during verify - 0.45 v output high voltage during verify 2.4 - v quick-pulse programming 12.5 13.0 v quick-pulse programming 6.0 6.5 v cex v pp / oex v dd outpu t pin name resetb v il v dd v il v ih v ol v oh v pp v dd i ol = 2.1ma v il v il v il v il v pp v il v pp v ih d in d out d out v il v ih v ih v il v pp = 12.50.5v test condition parameter symbo l i oh = -400ua
20 4bit single chip microcontroller dmc42c/p1008 package dimension [ unit : millimeter ] 80 qfp 20.00.1 17.90.25 0.80 0.350.05 23.90.25 14.00.1 0.150.05 3.00max 0.80.15 1.80.2

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